Interrupt enable register
| INX_Int | Indicates that an index pulse was detected. |
| TIM_Int | Indicates that a velocity timer overflow occurred |
| VELC_Int | Indicates that captured velocity is less than compare velocity. |
| DIR_Int | Indicates that a change of direction was detected. |
| ERR_Int | Indicates that an encoder phase error was detected. |
| ENCLK_Int | Indicates that and encoder clock pulse was detected. |
| POS0_Int | Indicates that the position 0 compare value is equal to the current position. |
| POS1_Int | Indicates that the position 1compare value is equal to the current position. |
| POS2_Int | Indicates that the position 2 compare value is equal to the current position. |
| REV_Int | Indicates that the index compare value is equal to the current index count. |
| POS0REV_Int | Combined position 0 and revolution count interrupt. Set when both the POS0_Int bit is set and the REV_Int is set. |
| POS1REV_Int | Combined position 1 and revolution count interrupt. Set when both the POS1_Int bit is set and the REV_Int is set. |
| POS2REV_Int | Combined position 2 and revolution count interrupt. Set when both the POS2_Int bit is set and the REV_Int is set. |
| REV1_Int | Indicates that the index 1 compare value is equal to the current index count. |
| REV2_Int | Indicates that the index 2 compare value is equal to the current index count. |
| MAXPOS_Int | Indicates that the current position count goes through the MAXPOS value to zero in forward direction, or through zero to MAXPOS in backward direction. |
| RESERVED | Reserved |